Embedded C school training courses in Chandler, AZ (public, in-house or online)

While most of the world is preoccupied with high-profile Network-based computer intrusions, this online course examines the potential for computer crime and the protection mechanisms employed in conjunction with the embedded computers that can be found within non-networked products (e.g., vending machines, automotive onboard computers, etc.).This course provides a basic understanding of embedded computer systems: differences with respect to network-based computers, programmability, exploitation ...

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This presentation is the first of a series on the new dsPIC DSC products. The dsPIC DSC devices are a family of high performance parts that combine the power of a 16bit MCU with some computional features of a DSP.

This web seminar is the fourth in a series of web seminars about the serial communication interfaces in the the dsPIC30F family of Digital Signal Controller devices. This session provides the attendees a basic understanding about the functionality and usage of the Controller Area Network (CAN) communication interface. The topics covered include the key features of this peripheral module, the processes of data transmission and reception through the CAN interface, as well as bit timing considerati...

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This web seminar is the third in a series of web seminars about the serial communication interfaces in the the dsPIC30F family of Digital Signal Controller devices. This session provides the attendees a basic understanding about the functionality and usage of the Inter-Integrated Circuit (I2C) communication interface. The topics covered include the key features of this peripheral module, the processes of data transmission and reception through the I2C interface, as well as various slave device a...

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This web seminar takes a closer look at the dsPIC33F Direct Memory Access (DMA) controller. During this presentation you’ll see how the dsPIC DMA controller implementation has been optimized for high performance real-time embedded application, where determinism and system latency are priorities. The DMA architecture will be reviewed from a system level perspective, discussing it’s key attributes along the way. The various operating modes will then be discussed together with examples of how they ...

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